==============================================================
Guild: wafer.space Community
Channel: 📐 - Designing / 📦-cob / KianV PCB HelpCenter
After: 2025-11-30 11:59 p.m.
Before: 2026-01-01 12:00 a.m.
==============================================================

[2025-12-18 4:32 p.m.] logic_destroyer



[2025-12-18 4:32 p.m.] logic_destroyer
@GoranMahovlic


[2025-12-18 4:46 p.m.] logic_destroyer
The asic/sdram operates at 30 MHz


[2025-12-18 4:46 p.m.] logic_destroyer
isn't critical - I think


[2025-12-18 8:36 p.m.] mithro_
@asic destroyer - I've done 720p60 over pin headers for HDMI - that is like 750MHz signals....

{Reactions}
👍

[2025-12-18 8:59 p.m.] logic_destroyer
Changed the channel name: KianV PCB HelpCenter


[2025-12-18 9:03 p.m.] logic_destroyer
@RebelMike   My question was: should I place the SDRAM on the bottom side or on the same side (top)? The connector is giving me a headache, because it forces a lot of distance to the SDRAM and the rat’s nest looks kind of weird. I’m planning a 4-layer board, and my reference is a Machdyne “Kuchen” board.


[2025-12-18 9:05 p.m.] logic_destroyer



[2025-12-18 9:05 p.m.] logic_destroyer



[2025-12-18 9:05 p.m.] logic_destroyer



[2025-12-18 9:07 p.m.] logic_destroyer


{Attachments}
2025-12_media/image-9B814.png
2025-12_media/image-63304.png
2025-12_media/image-DFEE2.png


[2025-12-18 9:07 p.m.] logic_destroyer
@RebelMike I hope it's now clear


[2025-12-18 9:31 p.m.] rebelmike
I haven't started looking at this connector yet, but I would expect there to be plenty of space for the RAM chip under the board so you don't need to push it out away from the connector


[2025-12-18 9:34 p.m.] rebelmike
The amount of crossing isn't ideal (I guess in an ideal world we'd have considered the connector pinout and eventual host PCB when choosing the pin assignment for the ASIC, but I certainly didn't do that).  But if you do mostly vertical on one layer and horizontal on another it'll probably work out ok.

{Reactions}
👍🏻

[2025-12-18 9:43 p.m.] logic_destroyer
Unfortunately I also focused only on the ASIC and only today I realized what the impact on the connector/PCB is… I’ll work with two sides and a 4-layer stackup… Do you have any ideas for the clock frequency generator—can you recommend something? I don’t want an MCU on the board.


[2025-12-18 10:01 p.m.] logic_destroyer
I’ll work with the top and bottom side. Thank you.


[2025-12-18 10:13 p.m.] rebelmike
I'm no expert, but maybe an SN74LVC1GX04 and an appropriate crystal

{Reactions}
❤️

[2025-12-18 10:39 p.m.] logic_destroyer
I forgot to mention that I have 300× CH32V003. We could use one as a clock generator


[2025-12-18 10:40 p.m.] logic_destroyer
https://de.aliexpress.com/item/1005005036714708.html


[2025-12-18 10:50 p.m.] logic_destroyer
Seems not ideal 🙁


[2025-12-18 10:52 p.m.] logic_destroyer
cmos 4-pin xo with socket seems a good solution


==============================================================
Exported 21 message(s)
==============================================================